Quantum computers have a noise problem. Their qubits are so fragile that errors creep in faster than calculations can finish, and the fix — quantum error correction — demands an enormous amount of classical computing power working alongside the quantum hardware. On November 5, 2026, IBM, the U.S. Department of Energy-funded Quantum Science Center at Oak Ridge National Laboratory (ORNL), and AMD unveiled a new co-design platform built to attack exactly that problem, placing quantum and classical machines side by side so researchers can test error-correction methods at real scale. It is not a finished fault-tolerant quantum computer. It is the workshop where one gets built.
What the Platform Actually Is
The new co-design platform for quantum error correction integrates IBM’s quantum computers with ORNL’s high-performance computing, with AMD supplying the classical compute. The first deployment co-locates IBM’s quantum systems — including its most powerful processor, the 120-qubit IBM Quantum Nighthawk — with ORNL’s Umbra HPC system, powered by AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs. The idea is to give researchers a shared environment where quantum hardware, classical accelerators, software and workflows can be designed together rather than bolted together afterwards. The platform will also connect with the Oak Ridge Leadership Computing Facility (OLCF), home to ORNL’s new Lux SI (Super Intelligence) + HPC supercomputer, also powered by AMD EPYC CPUs and Instinct GPUs. As IBM Fellow Jay Gambetta put it, “the question is no longer if error correction will work on quantum hardware. Today, the question is how to accelerate and optimize error correction to build systems that scientists can use to tackle meaningful problems.”
Why Error Correction Is the Wall Quantum Has to Climb
Error correction is the difference between a quantum demo and a quantum tool. A physical qubit loses its state quickly, so useful computation needs logical qubits — many physical qubits working together, with constant measurement and correction, to protect one unit of reliable information. The U.S. Department of Energy’s Quantum Genesis Mission, through its recently announced Q Competition, targets 100 logical qubits running 100,000 hard operations by late 2028. IBM says its current experiments have demonstrated up to 70 logical qubits and 438 hard operations, tracked on the Quantum Advantage Tracker. Closing the gap means roughly a 230-fold increase in hard operation count. That is the scale of the problem this platform exists to study: not whether error correction works in principle, but which codes, decoders and architectures can scale to that target. The same quantum threat that makes error correction urgent also makes post-quantum security urgent on the classical side — see STMicroelectronics’ STM32G5 microcontroller with post-quantum cryptography and the quantum countdown facing today’s encryption for how the industry is responding on both fronts.
Nighthawk Meets Umbra: The Hardware Pairing
The quantum side of the pairing is Nighthawk, IBM’s 120-qubit processor, whose square-lattice connectivity, industry-leading speed in maximum circuits per second, and real-time pulse control let researchers test error-correction techniques and compare what each method costs in qubits, time, samples and classical resources. The classical side is Umbra, ORNL’s HPC system built on AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs, which provides the computing foundation for error-correction research, decoding optimization and software orchestration. The point of co-locating them is tight integration: GPU accelerators can take on the heavy decoding work — figuring out, in real time, which errors occurred and how to correct them — while the quantum hardware runs the circuits. AMD CTO Mark Papermaster framed it as a holistic approach that “integrates quantum processors, high-performance computing and AI,” and the platform is designed so future generations of AMD compute, networking and open software can evolve alongside the quantum systems. Quantum computing also sits among 2026’s breakthroughs more broadly, as our roundup of quantum technologies among 2026’s breakthroughs notes — but this platform is about the unglamorous engineering underneath the headlines.
What Researchers Will Test First
The work will span the full error-correction stack: concatenated codes, space-time codes, algorithm-aware decoders, hardware-aware circuit optimization and compilation, and software orchestration, all integrated in one stack. A key enabler is IBM’s Quantum System API, which gives researchers deep pulse-level control over the quantum hardware — measuring qubits mid-calculation and acting on the results in real time, setting the exact timing of the signals that protect qubits from noise, seeing exactly what the hardware ran, and working directly with raw measurement signals. That level of control is what error-correction research needs, because the next generation of approaches can only be discovered on systems large enough to test real codes. Travis Humble, director of the Quantum Science Center, said the combination of ORNL’s HPC strength with IBM and AMD expertise creates an opportunity to “test new ideas, evaluate approaches at scale, and build the foundation for more reliable quantum computers.” For a sense of how quantum preparation is reaching even on-premises systems, see CodeBoxx’s CrewKit Forge and its quantum gateway, which lets teams rehearse quantum algorithms locally before running them on real qubits.
Why This Matters Beyond Quantum Computing
The platform builds on collaborations already underway. IBM and ORNL work together through the Quantum Science Center, and earlier this year showed how workloads running on both quantum computers and the Frontier supercomputer can simulate real magnetic materials and calculate molecular configurations of a promising material for producing fusion fuel. Separately, IBM is using AMD GPUs to accelerate the classical diagonalization step in sample-based quantum diagonalization, a key quantum-centric supercomputing workflow, and last year the two companies demonstrated an algorithm that efficiently decodes quantum errors on AMD chips. What the teams learn about error correction and HPC workflows will feed into IBM’s path to IBM Quantum Starling, its first fault-tolerant quantum computer, and future SI + HPC supercomputers — with DOE researchers ready to use them on day one. Read the joint IBM, ORNL and AMD announcement and AMD’s account of the classical computing foundation for the full details, and SiliconANGLE’s coverage of the launch for an independent take. The honest read: nobody is claiming fault-tolerant quantum computing has arrived. But for the first time, the quantum hardware, the classical muscle and the researchers are all in the same room, working on the same problem, with a deadline — late 2028 — attached.
Quantum computing’s biggest obstacle was never building more qubits; it was keeping them honest long enough to do useful work. IBM, Oak Ridge and AMD’s co-design platform attacks that obstacle directly, pairing a 120-qubit quantum processor with AMD-powered supercomputing to find out which error-correction methods actually scale. The 230-fold gap to the DOE’s 2028 target is a measure of how far there is to go — and of how seriously the field is now measuring progress. If the platform delivers, the payoff is not just a better quantum computer, but a template for how quantum, AI and high-performance computing grow up together.
