The smallest chips in the AI era are getting a security upgrade. STMicroelectronics has revealed the STM32G5, a new mixed-signal microcontroller series that doubles the compute performance of its STM32G4 predecessor and adds support for post-quantum cryptography — the quantum-resistant algorithms that regulators are starting to require. Announced at the STM32 Summit on November 3-4, 2026, the chip targets the unglamorous but critical work of real-time power conversion in AI data centers and precision motor control in robots, where a tiny controller decides how efficiently power flows and how smoothly a machine moves.
Twice the performance, built for real-time power and motion
The STM32G5 is built around an Arm Cortex-M33 core running at 280 MHz, scoring 1,136 CoreMark points against 569 for the STM32G4 at 170 MHz — roughly twice the compute performance, making it ST’s fastest Cortex-M33 to date. The analog side is where the series earns its “mixed-signal flagship” label: a 12-channel high-resolution timer with 111-picosecond resolution, a new position encoder, a 16-element programmable logic array, and an analog-to-digital converter running at 5 megasamples per second, up from 4. Memory tops out at 512 KB of flash with an optional dual-bank setup for live firmware upgrades, plus 96 KB of data flash and SRAM with error-correction support. The chips are in production now in single-core form, with packages from a compact QFN32 to LQFP128, priced from $1.034 per unit in 10,000-unit quantities. Dual-core variants arrive in 2027 with even more performance and peripherals.
Post-quantum security, baked into the silicon
Security is the STM32G5’s other headline. The Cortex-M33 brings Arm TrustZone isolation, and ST layers on its STM32Trust features: an immutable root of trust for secure boot and firmware updates, an updatable root of trust, secure key storage, tamper detection and resistance to side-channel attacks. The series targets SESIP Level 3 and PSA Certified Level 3 certifications. The forward-looking part is post-quantum cryptography: the dual-core version coming in 2027 will be ST’s first mixed-signal MCU with a hardware crypto core able to accelerate all NIST-approved PQC algorithms — LMS, ML-KEM (FIPS 203), ML-DSA (FIPS 204) and SLH-DSA (FIPS 205) — while single-core versions support the same algorithms through software libraries. Regulations from the European Commission, NIST and other agencies are already pushing systems toward quantum-resistant algorithms, so building PQC into a microcontroller now is about future-proofing designs that may stay in the field for a decade. For context on how defensive security thinking is spreading across the stack, see Tencent’s Hy4 open-source model for defensive cybersecurity.
Where the STM32G5 will show up first
ST positions the STM32G5 for AI data center power supplies, humanoid robot joints, photovoltaic inverters, EV chargers, battery management systems, industrial drives and commercial drones — the physical AI revolution, in the company’s words. Early adopters are already named: Delta Electronics is using the chip in power supplies, and Ruyan Intelligent Control is building it into a next-generation robotic hand. Development kits are available now, including the NUCLEO-G564RE and the B-G564E-DPOW1 and B-G564E-MC1S discovery kits. The chip also arrives alongside a broader STM32 push: a unified STM32 platform spanning industrial, automotive and robotics, the new STM32H7P high-performance series, the STM32A automotive family, redesigned Edge AI tools, and STM32Cube for Agentic AI, which gives AI coding agents access to ST’s STM32 knowledge and code generation tools. Small, efficient models running close to the hardware are part of the same shift — IndiaAI’s small, offline-capable Dhīr models.
What engineers should check before designing it in
The STM32G5 is a strong fit for teams building power conversion or motor control where efficiency, precision and long product lifetimes matter — and where compliance requirements are already pointing at PQC. Three things deserve a close look before committing: first, whether the single-core parts shipping now meet your performance needs, or whether your design should wait for the 2027 dual-core variants with the hardware PQC crypto core; second, whether the SESIP and PSA Level 3 certification targets match your market’s requirements, since certification applies to the finished product, not the chip alone; and third, how the new Edge AI tooling and agentic coding support fit your development workflow. Read ST’s blog post on the STM32G5’s performance and peripherals and ST’s blog post on the STM32G5’s post-quantum security for the full specifications, and Electronic Specifier’s coverage of the STM32 Summit announcements for the wider platform context. Like the secure edge connectivity in Atsign EdgeAI’s identity-first edge connectivity and the AI guardrails in Fortinet’s FortiGuard Inline AI Security Service for FortiGate, the STM32G5 shows security moving deeper into the hardware itself — down to the chip that switches the power.
